A Distributed Power Delivery and Decoupling Network Minimizing Ohmic Loss and Supply Voltage Variation in Silicon Nanoscale Technologies

A Distributed Power Delivery and Decoupling Network Minimizing Ohmic Loss and Supply Voltage Variation in Silicon Nanoscale Technologies

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As the transistor count and performance expectations of integrated circuits have grown, their power consumption has approximately doubled every thirty-six months. To minimize power consumption and maintain dielectric reliability, the supply voltage of microprocessors has been scaled down. As the operating voltage decreases, more current is required to meet the growing power requirements. This research addresses two significant problems created by these circumstances, each of which will continue to grow as time (and technology) progresses: IR events and di/dt events.[13] Intel Corporation, aquot;VRM 8.4 DC-DC Converter Design Guidelinesaquot;, October, 2001. [14] Intel Corporation, aquot;VRM 8.3 DC-DC Converter Design Guidelinesaquot;, March, 1999. [15] Intel Corporation, aquot;VRM 8.2 DC-DC Converter Design Guidelinesaquot;anbsp;...


Title:A Distributed Power Delivery and Decoupling Network Minimizing Ohmic Loss and Supply Voltage Variation in Silicon Nanoscale Technologies
Author: Mark Michael Budnik
Publisher:ProQuest - 2006
ISBN-13:

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